1. Field of the Invention
The present invention generally relates to integrated circuit dynamic random access memories (DRAM's) and, more particularly, to trench capacitor construction.
2. Background Description
As dynamic random access memory cells are scaled down (e.g., to dimensions of 0.15.mu. and below) to meet chip-size requirements for future generations, planar (i.e., horizontally disposed) devices can no longer be used as transfer devices. Such use is precluded because of the high channel doping necessary to meet the off-current requirement which leads to high junction leakage and poor retention time, particularly with a trench storage DRAM cell using a buried strap. Vertical transfer devices have been proposed to overcome the problem.
Vertical transfer devices generate, however, a new set of problems. For example, back-to-back device interference is created. In addition, the depth of the storage trenches and the shallow trench isolation must increase to accommodate a long channel of the vertical transfer. This increased depth complicates the fabrication process and adds to the cost of the product. Another problem is increased substrate sensitivity due to high doping required to minimize back-to-back interference. Furthermore, the long channel required for improved threshold voltage tolerance due to channel length variations due to the manufacturing process results in a penalty in the on-current. Yet another problem is variable channel surface geometry and gate oxide thickness because of the overlay variations between the silicon of the vertical metal oxide semiconductor field effect transistor (MOSFET) and storage trench regions.
To overcome the problems of conventional vertical DRAM cells, a new trench storage DRAM cell is provided having a vertical three-sided transfer device. It is an object of the present invention to provide a new and improved vertical transfer device that is built on top of a deep trench storage node and is compatible with contemporary DRAM process steps. It is another object of the present invention to provide dynamic random access memory cells that have increased on-current of the vertical MOSFETs. It is a further object of the present invention to provide dynamic random access memory cells that have channel regions of increased length in the active area which improves the threshold voltage tolerance. Still another object of the present invention is to provide dynamic random access memory cells that have flexibility in setting the length of the channel regions in the active area. Yet another object of the present invention is to provide dynamic random access memory cells which, because of the shapes and sizes of the trenches and the active area, reduce the risk associated with misalignment of the trenches and active area which can lead to variations in electrical characteristics.